Many platform processing devices including system-on-chip (SoC) devices require high performance capacity during active workloads, such as processing three-dimensional (3D) gaming applications. During active workloads, these platform processing devices may output a substantial amount of thermal energy and consume a substantial amount of power. While in some circumstances the higher thermal energy output and power consumption may be acceptable, many of these platform processing devices operate in an environment where they may be power and thermal limited. For example, these platform processing devices may operate in a mobile device, such as in a mobile phone, tablet or wearable computers, where a high thermal output and power consumption is undesirable.
In addition, these platform processing devices are at a disadvantage and pay a disproportionately large performance tax while running semi-active workloads, such as processing causal gaming applications and Internet applications. Many semi-active workloads do not benefit in improved quality or responsiveness from this higher performance capacity. As a result, the higher performance capacity of these platform processing devices may become a significant impairment under semi-active workloads. Consequently, there exists a substantial need for techniques to reduce power consumption and thermal output during active and semi-active workloads without impacting the platform processing device's performance capacity when fully active. It is with respect to these and other considerations that the embodiments described herein are needed.